The Indian Institute of Science (IISc) and Samsung Semiconductor India Research (SSIRA), a subsidiary of Samsung Electronics, have partnered to advance research and development (R&D) in the area of on-chip Electrostatic Discharge (ESD) protection.
ESD is the sudden and brief flow of electric current between two electrically charged objects. In order to safeguard ultra-high-speed serial connections in cutting-edge Integrated Circuits (ICs) and system-on-chip (SoC) products, the alliance aims to develop cutting-edge ESD device solutions, according to IISc.
The associated research will be conducted by Prof. Mayank Shrivastava’s group at IISc’s Department of Electronic Systems Engineering (DESE), and the results of this study will be implemented in Samsung’s advanced process nodes.
ICs and SoCs are necessary for almost every system we encounter, little or large, but they are particularly vulnerable to ESD failures when made using modern nanoscale CMOS (Complementary Metal Oxide Semiconductor) technologies. ESD failures are to blame for the bulk of IC chip failures and field returns, according to IISc, which explained the context.
IISc argued that ESD-related technology is a rare expertise and that businesses that are skilled at designing ESD protection devices and interface concepts dominate the market. As a result, R&D in ESD technology is essential to the semiconductor industry’s effort to develop highly dependable interfaces and SoCs that run at low power and high speed.
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